Upcoming release - coreboot 4.9¶
The 4.9 release is planned for November 2018
Update this document with changes that should be in the release notes.
- Please use Markdown.
- See the 4.7 and 4.8 release notes for the general format.
- The chip and board additions and removals will be updated right before the release, so those do not need to be added.
- Various code cleanups
device_tin favor of
struct device*in ramstage code
- Improve adherence to coding style
- Expand use of the postcar stage
- Add bootblock compression capability: on systems that copy the bootblock from very slow flash to ERAM, allow adding a stub that decompresses the bootblock into ERAM to minimize the amount of flash reads
- Rename the POWER8 architecture port to PPC64 to reflect that it isn’t limited to POWER8
- Update IASL to version 10280531